1. Field of the Invention
The present invention relates to a sampling circuit for sampling received input signals, Particularly, relates to a sampling circuit for generating sampling pulses using a step recovery diode.
2. Related Art
Generally, a circuit using SRD (step recovery diode) is known as a circuit for sampling input signals as disclosed, for example, in Japanese Patent Unexamined Publication No. 2004-179912. The circuit generates sampling pulses using the SRD and samples input signals by such as a diode bridge.
FIG. 5 shows an example of the configuration of a conventional sampling circuit 200. The sampling circuit 200 includes a pulse generator 210, a capacitor 220, a transmission path 230, a SRD 240 and a diode bridge 250.
The pulse generator 210 generates pulse signals according to a timing at which an input signal should be sampled. The SRD 240 receives the pulse signal and generates a sampling pulse based on the received pulse signal. The diode bridge 250 samples the input signal at the timing of the sampling pulse.
The pulse signal generated by the pulse generator 210 is applied to the SRD 240 through the transmission path 230 with an amount of delay tpd. The pulse signal arrived at the SRD 240 is reflected therefrom and arrives at the capacitor 220 through the transmission path 230. The pulse signal arrived at the capacitor 220 is inversed and reflected therefrom and is applied to the SRD 240 through the transmission path 230. Thus, the pulse signal and the inverted signal thereof, which is delayed from the pulse signal for 2tpd are applied to the SRD 240. Based on the composite wave of the pulse signal and the inverted signal, the SRD 240 generates a sampling pulse with the pulse width corresponding to the delay time 2tpd through the transmission path 230.
The timing at which the SRD outputs a sampling pulse is dependent on the temperature of the SRD in general. Therefore, the period during which the SRD 240 receives a sampling signal and outputs a sampling pulse is dependent on the temperature of the SRD 240. The reason is that the period during which the SRD 240 receives a sampling signal and outputs a sampling pulse is determined based on a storage time ts (a time for which a reverse current is applied), and the storage time is dependent on the temperature of the SRD 240.
Here, the temperature of the SRD 240 is varied with such as a frequency of operation and ambient environment. Therefore, an error of the timing at which the SRD outputs a sampling pulse has been occurred in the conventional sampling circuit, and it has been difficult that input signals are accurately sampled.